Hi Doug,
Thanks for following up. See inline for answers to some questions you asked.
I don't believe that the behavior of programming the IOAPIC with legacy style entries is architecturally defined when x2APIC is enabled. The Intel SDM indicates that the IOAPIC entries must be in the new re-mappable format:
Hmm.
My interpretation of the language in the specification actually suggests that x2APIC is fully compatible with legacy ioapic.
Neither Linux nor Windows will use x2APIC with legacy style IOAPIC entries - they both require VT-D and program the IOAPIC with remappable format interrupts.
Yup, but the x2APIC spec does not require that behavior, nor does the hardware that I tested this on.
when you booted this natively on a bare metal Intel Xeon system were you using VT-D and interrupt remapping?
No
If no have you tried it on Sandybridge?
I have tried this on both Sandybridge (E5-2609, E5-2658) and Ivybridge systems and it works fine on both.
How many CPUs were you using on the Xeon system?
4, 8 and 16 cores. The 4 and 8 core systems were single socket and the 16 core was a two socket system.
best
Neel